Deep Neural Learning based Deming Regression Adder Enhancement on Digital Multiplier for 3D Graphical Applications in VLSI Circuits

Modeling and Comparative Analysis of Logic Gates for Adder and Multiplier Applications -A VLSI based approach

The logic gates are the fundamental building blocks of VLSI and embedded applications. These gates can be designed using several design techniques and implemented at different levels of architectures. This paper focuses on design and evaluate the performance of logic gates used in the Adders and Multiplier using various design technique like CMOS design GDI design and PTL design. These differen...

Static Simulation of CNTFET-based Digital Circuits

   In this paper we implement a simple DC model for CNTFETs already proposed by us in order to carry out static analysis of basic digital circuits. To verify the validity of the obtained results, they are compared with those of Wong model, resulting in good agreement, but obtaining a lighter ensuring compile and shorter execution time, which are the main character...

VLSI Implementation of FIR Filter Using Computational Sharing Multiplier Based on High Speed Carry Select Adder

Recent advances in mobile computing and multimedia applications demand high-performance and lowpower VLSI Digital Signal Processing (DSP) systems. One of the most widely used operations in DSP is Finite-Impulse Response (FIR) filtering. In the existing method FIR filter is designed using array multiplier, which is having higher delay and power dissipation. The proposed method presents a program...

A Digital Metastability Model for VLSI Circuits

PhD Thesis A Digital Metastability Model for VLSI Circuits PhD candidate Thomas Polzer Reviewers Ao. Univ.-Prof. Dipl.-Ing. Dr. techn. Andreas Steininger Prof. Alex Yakovlev, PhD, DSc This thesis develops a digital model for predicting failure rates caused by marginal triggering, so called metastability, of CMOS storage elements. To derive the underlying model, various storage elements are simu...

Digital VLSI for Neural Networks